Crux Interfacing Solutions CRXi 122801 Manual de usuario

CRXi µµµµCore ModuleCRµµµµX Logic, 2001 all rights reserved1CCRRµµµµµµµµXX LLooggiiccCRXi ManualFor CRXi 122801.xxxxxxx, 22611.xxxxxxxRevision

CRXi µµµµCore ModuleCRµµµµX Logic, 2001 all rights reserved10External Chip SelectsThe CRXi comes standard with three active low chip selects. Th

CRXi µµµµCore ModuleCRµµµµX Logic, 2001 all rights reserved11or output. output mode for NVSRAM access.Must read all ones, FFh.Direction – Port

CRXi µµµµCore ModuleCRµµµµX Logic, 2001 all rights reserved12This is a brief summary of the configuration registers that reside in the CSIOP dat

CRXi µµµµCore ModuleCRµµµµX Logic, 2001 all rights reserved13Note the prompt 0>. The 0 indicates we are on the default page 0. At this promp

CRXi µµµµCore ModuleCRµµµµX Logic, 2001 all rights reserved14PSets memory page. By default, page is set to 0. This is indicated by the number pr

CRXi µµµµCore ModuleCRµµµµX Logic, 2001 all rights reserved15Figure 6IDump internal RAM contents. No parameters are necessary. A single ‘I’ comm

CRXi µµµµCore ModuleCRµµµµX Logic, 2001 all rights reserved16the first address that contains an incorrect data value is returned. This test will

CRXi µµµµCore ModuleCRµµµµX Logic, 2001 all rights reserved2INTRODUCTION...

CRXi µµµµCore ModuleCRµµµµX Logic, 2001 all rights reserved3IntroductionOverviewThank you for your purchase of the CRXi core module. The CRXi is

CRXi µµµµCore ModuleCRµµµµX Logic, 2001 all rights reserved4TrademarksAny brand and/or product names mentioned herein are trademarks or register

CRXi µµµµCore ModuleCRµµµµX Logic, 2001 all rights reserved5PIN DESCRIPTION1 VCC – 5 VDC power input2 P10 - U1 port 1.0 general purpose I/O or e

CRXi µµµµCore ModuleCRµµµµX Logic, 2001 all rights reserved654 PD1 – U2 general purpose I/O55 PD2 – U2 general purpose I/O56 GNDTable 1Pin Descr

CRXi µµµµCore ModuleCRµµµµX Logic, 2001 all rights reserved7ConnectionsBecause the end users hardware applications are all different, no headers

CRXi µµµµCore ModuleCRµµµµX Logic, 2001 all rights reserved8This diagram (Figure 1) completes the requirement for a ‘NULL’ connection and would

CRXi µµµµCore ModuleCRµµµµX Logic, 2001 all rights reserved9The flash area that contains the bootloader code consists of four 8K (2000h) segment